1. Field of the Invention
The present invention relates to a synchronous rectifier circuit.
2. Description of the Related Art
In order to rectify an AC signal, a rectifier circuit is employed. Known examples of such a rectifier circuit include a diode bridge circuit employing diodes and a synchronous rectifier circuit employing transistors (switches). FIG. 1 is a circuit diagram showing a synchronous rectifier circuit. A synchronous rectifier circuit 100 includes a first transistor M1 through a fourth transistor M4 connected in the form of a bridge circuit, diodes D1 through D4, and a control circuit 200. The control circuit 200 turns on and off, in a complementary manner, a first pair consisting of the first transistor M1 and the fourth transistor M4, which are oppositely positioned, and a second pair consisting of the second transistor M2 and the third transistor M3, which are oppositely positioned. The output of the synchronous rectifier circuit 100 is connected to a smoothing capacitor 120. Input terminals AC1 and AC2 of the synchronous rectifier circuit 100 allow an unshown circuit to input or otherwise to output AC currents IAC1 and IAC2 to or otherwise from the synchronous rectifier circuit 100, with phases that are the reverse of each other. The direction of the current IAC1 or IAC2 that flows to the synchronous rectifier circuit 100 will be referred to as the “positive direction”.
A diode bridge circuit requires no complicated control operation, and accordingly requires only a simple configuration. However, such a diode bridge circuit has a problem of power loss due to voltage drop across the diodes. The synchronous rectifier circuit 100 employs transistors that each have a low on resistance, i.e., that each involve only a small voltage drop, thereby providing an advantage of little power loss. Thus, in a case of ideally operating the synchronous rectifier circuit 100, such an arrangement provides high-efficiency rectification operation.
FIGS. 2A through 2C are waveform diagrams each showing the operation of the synchronous rectifier circuit 100. It should be noted that the vertical axis and the horizontal axis shown in the waveform diagrams and the time charts in the present specification are expanded or reduced as appropriate for ease of understanding. Also, each waveform shown in the drawing is simplified or exaggerated for emphasis for ease of understanding. In order to operate the synchronous rectifier circuit 100 with high efficiency, there is a need to switch each transistor with a timing at which the current I becomes zero (zero-crossing point). Such an operation will be referred to as the “zero current switching”.
FIGS. 2B and 2C each show the current IAC1 and the voltage VAC1 in the vicinity of a zero current point. FIG. 2B shows an ideal operation with high efficiency. In this operation, each switch is switched at the same time as the zero-crossing point of the current IAC1.
The control circuit 200 detects such a zero-crossing timing using any particular method. Furthermore, the control circuit 200 switches the circuit state immediately after the zero-crossing timing. However, in actuality, the zero-crossing timing detection requires a predetermined time period, leading to a non-negligible delay in the zero-crossing timing detection. Furthermore, a control delay and propagation delay occur before the circuit state switches after the zero-crossing timing is detected. FIG. 2C shows a case in which there is a delay τ before the circuit state switches after the zero-crossing timing tZC occurs. During the delay τ, the first transistor M1 is turned off. In this state, the current IAC1, which is input to the synchronous rectifier circuit 100 via the AC1 terminal, flows through the diode D1 arranged in parallel with the first transistor M1, which leads to degraded efficiency. In particular, in a case of inputting the current IAC having a high frequency, such a delay τ has a serious adverse effect on efficiency, i.e., leads to marked degradation in efficiency.